Editing RISC-V (section)

===RV32E===
RV32E is the embedded extension that lowers from 32 registers to 16...

"RV32E uses a subset of the Soft-Float calling convention. As only 16 integer registers x0–x15 are present, there are only six argument registers (x10–x15), two saved registers (x8–x9), and three temporary registers (x5–x7). The stack is kept aligned on a four-byte boundary."

"RV32E uses the same instruction set encoding as RV32I, except that use of register specifiers
x16–x31 in an instruction will result in an illegal instruction exception being raised."

"A further simplification is that the counter instructions (rdcycle[h],rdtime[h], rdinstret[h])
are no longer mandatory."

"The mandatory counters require additional registers and logic, and can be replaced with more
application-specific facilities."