RISC-V: Difference between revisions

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x111xxxxx1111111 Reserved for ≥192-bits
x111xxxxx1111111 Reserved for ≥192-bits


===Word Size===
* [http://stackoverflow.com/questions/29618439/what-is-the-size-of-integer-in-8-bit-16-bit-32-bit-processors-microcontrollersOn an 8-bit Atmel AVR Arduino, sizeof(int) returns 2 (e.g. 16-bits) when compiled with GCC 4.3.2 (WinAVR 20081205)]
* [http://stackoverflow.com/questions/29618439/what-is-the-size-of-integer-in-8-bit-16-bit-32-bit-processors-microcontrollersOn an 8-bit Atmel AVR Arduino, sizeof(int) returns 2 (e.g. 16-bits) when compiled with GCC 4.3.2 (WinAVR 20081205)]
* [http://electronics.stackexchange.com/questions/203252/what-determines-sizeofint int is a C type. The ATMega's have no concept of it, they work only with 8bit bytes (because they have 8bit AVR CPUs).]
* [http://electronics.stackexchange.com/questions/203252/what-determines-sizeofint int is a C type. The ATMega's have no concept of it, they work only with 8bit bytes (because they have 8bit AVR CPUs).]

Revision as of 06:54, 2 November 2016

Instructions in binary

Minimum Sized ISA

Registers

  • R32, 5-Bits specify register. 32 registers
  • 4-bits will get you 16 (14)
  • 3-Bits will get you 8 (6)
  • 2 registers are fixed. R0 is always zero, XLEN-1 (last reg) is PC.

Op Codes

  • All the 32-bit instructions in the base ISA have their lowest two bits set to 11
xxxxxxxxxxxxxxaa 16-bit (aa != 11)
xxxxxxxxxxxbbb11 32-bit (bbb != 111)
xxxxxxxxxx011111 48-bit
xxxxxxxxx0111111 64-bit
xnnnxxxxx1111111 (80+16*nnn)-bit, nnn != 111
x111xxxxx1111111 Reserved for ≥192-bits

Word Size